In many different kinds of electronic devices, for example in communication devices, phase-locked loops (PLLs) are used for frequency synthesis. In general, with phase-locked loops output signals may be generated which have a predetermined frequency and phase relationship with a reference signal, for example a reference clock signal.
Controlling such phase-locked loops conventionally involves the determination of a phase and/or frequency relationship between the output signal of the phase-locked loop and the reference signals. In some application, for example in digital phase-locked loops, a low resolution of such a phase difference detection may cause unwanted effects like jitter which may comprise low frequency components.